Comparison of Technical Specifications
| RT Box CE | RT Box 1 | RT Box 2 | RT Box 3 | ||
|---|---|---|---|---|---|
| Processor | Xilinx Zynq | Z-7030 | ZU9EG | ||
| CPU cores | 2 x 1 GHz | 4 x 1.5 GHz | |||
| FPGA simulation | No | Yes, <1us step sizes | |||
| Nanostep® solver* | Units | 1 | 2 | ||
| Step size | 7.5 ns | 4 ns | |||
| Analog inputs | Channels | 8 | 16 | 32 | |
| Resolution | 16 bit, simultaneous sampling | ||||
| Voltage ranges | -10 ... 10 V -5 ... 5 V | ||||
| Input type | Differential | ||||
| Max. sample rate | 2 Msps | 5 Msps | 2.5 Msps | ||
| Input impedance | 1 MΩ, 24 pF | ||||
| Connector | D-SUB 37 pin male | ||||
| Analog outputs | Channels | 16 | 32 | ||
| Resolution | 16 bit, simultaneous update | ||||
| Voltage ranges | -10 ... 10 V 0 ... 10 V -5 ... 5 V 0 ... 5 V | ||||
| Max. update rate | 2 Msps | 5 Msps | |||
| Output impedance | 0 Ω | ||||
| Max. output current | 10 mA | ||||
| Connector | D-SUB 37 pin female | ||||
| Digital inputs | Channels | 32 | 64 | ||
| Logic levels | 3.3 V (5 V tolerant) | ||||
| Connector | D-SUB 37 pin male | ||||
| Digital outputs | Channels | 32 | 64 | ||
| Logic levels | 3.3 V 5 V | ||||
| Connector | D-SUB 37 pin female | ||||
| Resolver | Input/Output | –/– | 1/1 | 2/2 | |
| Connector | D-SUB 9 pin male/fem. | ||||
| I/O protection | Short-circuit | Permanent | |||
| Overvoltage | -24 ... 24 V | ||||
| Connectivity | Gigabit Ethernet | 1 | 2 | ||
| SFP+ interconnects 6.25 Gbps per lane | – | 4 | 8 | ||
| Industrial Ethernet | – | 2 (EtherCAT) | |||
| CAN bus | 2 | ||||
| RS 232/422/485 | – | 2 | |||
| USB A 2.0/3.0 | 1/– | –/1 | |||
| DisplayPort | – | 1 | |||
| Storage | Internal SSD | – | 480 GB | ||
| Firmware | SD card | ||||
| Power supply (internal) | 100 ... 240 Vac 50 ... 60 Hz | 30 VA | 50 VA | 65 VA | 100 VA |
| Size | Depth x Width (mm) | 225 x 165 | 310 x 250 | ||
| Height (mm) | 55 | 100 | 145 | ||
| Weight (kg) | 1.3 | 3.1 | 3.2 | 3.9 | |
* The Nanostep solver will be available as a free firmware update sometime in Q4 2024.