ePWM Type 1 Register
Purpose
High fidelity model of TI's C2000 ePWM module with register based configuration.
Library
Processor in the Loop / Peripherals / TI C2000 / ePWM
Description
This block efficiently models the behavior of a single TI Type 1 ePWM module with full timing resolution for a fixed PWM period. Beneath the typical PWM generation it also supports the features provided by the Event Trigger and the Deadband submodule. The block is configured using register values which closely emulates the hardware implementation. The registers can be entered in decimal (15), binary (0b1111) or hexadecimal (0xF) representation.
For a detailed description of the supported features and the usage of the block please refer to the detailed documentation Enhance Pulse Width Modulator (ePWM) Type 1.
Parameters
- System Clock [Hz]
- The system clock of the processor defined in Hz.
- TBPRD
- Period value of the internal counter defining the period of the PWM signal.
- TBCTL
- Time-Base control register.
- CMPCTL
- Compare control register.
- AQSFRC
- Action-Qualifier software force register.
- ETSEL
- Event-Trigger selection register.
- ETPS
- Event-Trigger prescale register.
- DBCTL
- Dead-Band control register.
- DBRED
- Dead-Band generator rising-edge delay register.
- DBRED
- Dead-Band generator falling-edge delay register.
Probe Signals
- CMPx
- Compare register.
- AQCTLx
- Action qualifier configuration.
- AQCSFRC
- Action qualifier software forcing configuration.
- EPWMx
- EPWM outputs.
- EPWMSOCx
- EPWM SOC pulse outputs.
- TBPRD
- Period of PWM counter.
- TBCTL
- Time-Base control register.
- CMPCTL
- Compare-Control register.
- AQSFRC
- Action-Qualifier software force register.
- ETSEL
- Event-Trigger selection register.
- ETPS
- Event-Trigger prescale register.
- DBCTL
- Dead-Band control register.
- DBRED
- Dead-Band generator rising-edge delay register.
- DBRED
- Dead-Band generator falling-edge delay register.