The PIL Block serves as the interface between the simulation model and the embedded processor. It automatically extracts the variables of the embedded code from its binary file and makes them available via input and output ports.
High Fidelity Peripheral Models
Microcontrollers (MCUs) for control applications typically contain peripheral modules such as Analog-to-Digital Converters (ADCs) and pulse width modulators.
When simulating power converters with embedded controls, it is important to model such peripherals as accurately as possible to properly reflect timing and quantization effects.
Accurate peripheral models are even more valuable in the context of Processor-In-the-Loop (PIL) simulations.
The PLECS PIL package includes a component library with high-fidelity MCU peripheral models which work at the register level, and are therefore well suited for PIL simulations. Most components also include a second implementation with a graphical user interface (GUI) that automatically determines the register configurations based on text-based parameter settings.