STM32 F4 ADC REG
Purpose
High fidelity model of STM32 F4 ADC module with register based configuration.
Library
Processor in the Loop / Peripherals / STM32 F4 / ADC
Description
This block models the STM32 F4 ADC module. The block is configured using register values which closely emulates the hardware implementation. The registers can be entered in decimal (15), binary (0b1111) or hexadecimal (0xF) representation.
For a detailed description of the supported features and the usage of the block please refer to the detailed documentation Analog Digital Converter (ADC).
Parameters
- PCLK2 [Hz]
- The clock used as as the adc time base in Hz.
- ADC_CCR
- Common control register defining a clock prescaling.
- Reference[LO,HI]
- Specification of the reference voltage in mask.
- ADC_CCR1
- ADC Control register 1.
- ADC_CCR2
- ADC Control register 2.
- ADC_SMPRx
- ADC sample time control registers.
- ADC_SQRx
- ADC regular sequence control registers.
- ADC_JSQR
- ADC injected sequence control register.
- Output Mode
- Defines representation of conversion results.
Probe Signals
- ADC_CCR
- ADC Common Control register resulting from mask settings.
- ADC_CRx
- ADC Control registers resulting from mask settings.
- ADC_SMPRx
- Sample time control registers resulting from mask settings.
- ADC_SQRx
- Regular sequence registers resulting from mask settings.
- ADC_JSQR
- Injected sequence register resulting from mask settings.