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STM32 F4 ADC GUI

Purpose

High fidelity model of STM32 F4 ADC module with Graphical User Interface configuration.

Library

Processor in the Loop / Peripherals / STM32 F4 / ADC

Description

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This block models the STM F4 ADC module. With the Graphical User Interface, the block can simply be configured using combo boxes in the component mask. Under the hood, the resulting register configuration is forwarded to the register based implementation of the STM F4 ADC module. The resulting register configuration further is accessible via the probe signals.

For a detailed description of the supported features and the usage of the block please refer to the detailed documentation Analog Digital Converter (ADC).

Parameters

ADC General

PCLK2 [Hz]
The clock used as as the adc time base in Hz.
ADC_CCR.ADCPRE
Register cell defining a clock prescaler.
Reference[LO,HI]
Specification of the reference voltage in mask.
ADC_CR1.RES
Defines ADC resolution.
ADC_CR1.DISCNUM
Defines regular channels converted in discontinuous mode.
ADC_CR1.JDISCEN
Enables discontinuous mode for injected channels.
ADC_CR1.DISCEN
Enables/disables discontinuous mode for regular channels.
ADC_CR1.JAUTO
Enables/disables automatic injected group conversion.
ADC_CR1.SCAN
Enables/disables scan mode.
ADC_CR1.JEOCIE
Enables/disables interrupt pulses on JEOC_INT.
ADC_CR1.EOCIE
Enables/disables interrupt pulses on EOC_INT.
ADC_CR2.EOCS
Defines EOC flag occurrence in scan mode.
Output Mode
Defines representation of conversion results.

ADC_SMPRx

ADC_SMPRx.SMPy
Defines sampling length for corresponding input.

ADC_SQRx

ADC_SQRx.L
Defines regular group length and dimension of ADC_DR.
ADC_SQRx.SQy
Defines input sampled by regular group element y.

ADC_JSQR

ADC_SQR.JL
Defines injected group length and dimension of ADC_JDR.
ADC_JSQR.JSQy
Defines input sampled by injected group element y.

Probe Signals

ADC_CCR
ADC Common Control register resulting from mask settings.
ADC_CRx
ADC Control registers resulting from mask settings.
ADC_SMPRx
Sample time control registers resulting from mask settings.
ADC_SQRx
Regular sequence registers resulting from mask settings.
ADC_JSQR
Injected sequence register resulting from mask settings.