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SR Flip-flop

Purpose

Implement set-reset flip-flop

Library

Control / Logical

Description

pict

The SR Flip-flop behaves like a pair of cross-coupled NOR logic gates. The output values correspond to the following truth table:

SRQ/Q
00No changeNo change
0101
1010
11Restricted (0)Restricted (0)

The combination S = R = 1 is restricted because both outputs will be set to 0, violating the condition Q = not(/Q). If both inputs change from 1 to 0 in the same simulation step, Q will be set to 0 and /Q to 1.

Parameters

Initial state
The state of the flip-flop at simulation start.

Probe Signals

S
The input signal S.
R
The input signal R.
Q
The output signals Q.
/Q
The output signals /Q.