TI C2000 eCAP Type 0 CAP GUI
Purpose
High fidelity model of TI's C2000 eCAP module operated in Capture mode with Graphical User Interface configuration.
Library
Processor in the Loop / Peripherals / TI C2000 / eCAP
Description
This block efficiently models the behavior of a single TI Type 0 eCAP module operated in capture mode. With the Graphical User Interface, the block can simply be configured using combo boxes in the component mask. Under the hood, the resulting register configuration is forwarded to the register based implementation of the TI Type 0 eCAP module operated in capture mode. The resulting register configuration further is accessible via the probe signals.
For a detailed description of the supported features and the usage of the block please refer to the detailed documentation Enhance Capture (eCAP) Module Type 0.
Parameters
eCAP General
- System Clock [Hz]
- The system clock of the processor defined in Hz.
- Counter Sampling Frequency [Hz]
- Frequency at which the counter value is updated.
ECCTL1
- ECCTL1.CAPxPOL
- Select CAPx capture events on rising or falling edge.
- ECCTL1.CTRSTx
- Enable counter reset after CAPx capture event.
- ECCTL1.CAPLDEN
- Enable loading of counter value into capture registers on capture events.
- ECCTL1.PRESCALE
- Event prescaler bits to reduce the frequency of the input capture signal.
ECCTL2
- ECCTL2.STOP_WRAP
- Select capture event after which counter wrapping occurs.
ECEINT
- ECEINT.CEVTx
- Enable interrupt generation at capture event x.
- ECEINT.CTROVF
- Enable generation of interrupt at counter overflow event.
Probe Signals
- eCAP PSout
- Post-scaled ECAPx pin events.
- eCAP Counter
- Counter value sampled at user specified frequency.
- ECCTLx
- ECAP control register x.
- ECEINT
- ECAP interrupt enable register.