TI C2000 ADC Type 2 GUI
Purpose
High fidelity model of TI's C2000 ADC module with Graphical User Interface configuration.
Library
Processor in the Loop / Peripherals / TI C2000 / ADC
Description
This block models the TI Type 2 ADC module. With the Graphical User Interface, the block can simply be configured using combo boxes in the component mask. Under the hood, the resulting register configuration is forwarded to the register based implementation of the TI Type 2 ADC module. The resulting register configuration further is accessible via the probe signals.
For a detailed description of the supported features and the usage of the block please refer to the detailed documentation Analog Digital Converter (ADC) Type 2.
Parameters
ADC General
- HSPCLK [Hz]
- The system clock of the processor defined in Hz.
- ADCTRL3.ADCCLKPS
- Register cell defining a clock prescaler.
- ADCTRL1.CPS
- Register cell defining a clock prescaler.
- Vref [VREFLO, VREFH]
- Specification of reference voltage in mask.
- ADCTRL1.ACQ_PS
- Specification the width of the ADC sampling window.
- Output Mode
- Defines representation of conversion results.
- Sequencer x Reset
- Determines reset of Sequencer x state-pointer either internally after an EOS event or externally through the RST_SEQx input.
ADCTRL
- ADCTRL1.SEQ_CASC
- Selects operation of ADC in Dual or Cascaded sequencing mode.
- ADCTRL2.ePWM_SOCy_SEQx
- Enables the start-of-conversion of SEQx by a ePWM_SOCy trigger.
- ADCTRL2.INT_MOD_SEQx
- Selects the generation of an ADC interrupt at every EOS or every other EOS for SEQx.
- ADCTRL2.INT_ENA_SEQx
- Enables the generation of an ADC interrupt for SEQx.
- ADCTRL2.ePWM_SOCB_SEQ
- Enables the start-of-conversion of SEQ by a ePWM_SOCB trigger.
- ADCTRL3.SMODE_SEL
- Selects the operation of the ADC in simultaneous or sequential sampling mode.
ADCCHSELSEQx
- CONVnn
- Selects input channel converted by the ADC.
Probe Signals
- Pending SEQx Trigger
- Pending trigger for SEQx.
- SOC Flag
- Start of conversion flag for ADC.
- EOS Flag for SEQx
- Generates an end-of-sequence signal for SEQx.
- ADCCTLx
- ADC Control registers resulting from mask settings.
- ADCMAXCONV
- Maximum ADC conversions resulting from MAX_CONV1 and MAX_CONV2 inputs.
- ADCCHSELSEQx
- ADC Channel select resulting from mask settings.