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TI C2000 eCAP Type 0 CAP REG

Purpose

High fidelity model of TI's C2000 eCAP module operated in capture mode with register based configuration.

Library

Processor in the Loop / Peripherals / TI C2000 / eCAP

Description

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This block efficiently models the behavior of a single TI Type 0 eCAP module operated in capture mode. The block is configured using register values which closely emulates the hardware implementation. The registers can be entered in decimal (15), binary (0b1111) or hexadecimal (0xF) representation.

For a detailed description of the supported features and the usage of the block please refer to the detailed documentation Enhance Capture (eCAP) Module Type 0.

Parameters

System Clock [Hz]
The system clock of the processor defined in Hz.
Counter Sampling Frequency [Hz]
Frequency at which the counter value is updated.
ECCTLx
ECAP control register x.
ECEINT
ECAP interrupt enable register.

Probe Signals

eCAP PSout
Post-scaled ECAPx pin events.
eCAP Counter
Counter value sampled at user specified frequency.
ECCTLx
ECAP control register x.
ECEINT
ECAP interrupt enable register.