TI C2000 ePWM Type 4 GUI
Purpose
High fidelity model of TI's C2000 ePWM module with Graphical User Interface configuration.
Library
Processor in the Loop / Peripherals / TI C2000 / ePWM
Description
This block efficiently models the behavior of a single TI Type 4 ePWM module with full timing resolution for a variable PWM period. Beneath the typical PWM generation it also supports the features provided by the Event Trigger and the Deadband submodule. With the Graphical User Interface, the block can simply be configured using combo boxes in the component mask. Under the hood, the resulting register configuration is forwarded to the register based implementation of the TI Type 4 ePWM module. The resulting register configuration further is accessible via the probe signals.
For a detailed description of the supported features and the usage of the block please refer to the detailed documentation Enhance Pulse Width Modulator (ePWM) Type 4.
Parameters
ePWM General
- System Clock [Hz]
- The system clock of the processor defined in Hz.
- EPWM Prescaler
- Prescaler to divide down the system clock to generate the EPWM clock.
- TBCTL.CLKDIV
- Register cell defining a clock prescaler.
- TBCTL.HSPCLKDIV
- Register cell defining a high speed clock prescaler.
- TBCTL.CTRMODE
- Register cell for count mode configuration.
- CMPCTL.LOADxMODE
- Specification of Reload Event for CMPx.
- AQSFRC.RLDCSF
- Specification of Reload Event for AQCSFRC.
Event-Trigger module
- ETSEL.SOCxEN
- Enables pulse generation on EPWMSOCx.
- ETSEL.SOCxSEL
- Selects event source for Event-Trigger counter increment.
- ETSEL.SOCxSELCMP
- Selects CMPA/CMPB or CMPC/CMPD as event source for Event-Trigger counter increment.
- ETPS.SOCxPRD
- Specifies Event-Trigger 2-bit counter period.
- ETPS.SOCPSSEL
- Selects ETPS[SOCxPRD] or ETSOCPS[SOCxPRD2] to determine frequency of events
- ETSOCPS.SOCxPRD2
- Specifies Event-Trigger 4-bit counter period.
- ETCNTINIT.SOCxINIT
- Sets initial Event-Trigger counter value.
Dead-Band module
- DBCTL.HALFCYCLE
- Enables clocking of DB-counter with halfed time-base period.
- DBCTL.DEDB_MODE
- Enables dual edge dead-band mode.
- DBCTL.OUTSWAP
- Swaps one or both output signals.
- DBCTL.LOADFEDMODE
- Controls transfer of DBFED shadow to active register.
- DBCTL.LOADREDMODE
- Controls transfer of DBRED shadow to active register.
- DBCTL.INMODE
- Configures input source to the falling-edge and rising-edge delays.
- DBCTL.POLSEL
- Specifies polarity inversion of the edge delay outputs.
- DBCTL.OUTMODE
- Selectively enable or bypass the Dead-Band generation.
Probe Signals
- CMPx
- Compare register.
- Tx
- Tx events.
- AQCTLx
- Action qualifier configuration.
- AQCTLx2
- Action qualifier configuration.
- AQCSFRC
- Action qualifier software forcing configuration.
- EPWMx
- EPWM outputs.
- EPWMSOCx
- EPWM SOC pulse outputs.
- TBPRD
- Period of PWM counter.
- TBCTL
- Time-Base control register resulting from mask settings.
- CMPCTL
- Compare-Control register resulting from mask settings.
- CMPCTL2
- Compare-Control register 2 resulting from mask settings.
- AQSFRC
- Action-Qualifier software force register resulting from mask settings.
- ETSEL
- Event-Trigger selection register resulting from mask settings.
- ETPS
- Event-Trigger prescale register resulting from mask settings.
- ETCNTINIT
- Event-Trigger counter initialization register resulting from mask settings.
- ETSOCPS
- Event-Trigger SOC prescaler register resulting from mask settings.
- DBCTL
- Dead-Band control register resulting from mask settings.
- DBRED
- Dead-Band generator rising-edge delay register.
- DBRED
- Dead-Band generator falling-edge delay register.