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MC dsPIC33F MCADC REG

Purpose

High fidelity model of the Microchip dsPIC33F motor control ADC module with register based configuration.

Library

Processor in the Loop / Peripherals / Microchip dsPIC33F / ADC

Description

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This block models the Microchip motor control ADC module. The block is configured using register values which closely emulates the hardware implementation. The registers can be entered in decimal (15), binary (0b1111) or hexadecimal (0xF) representation.

For a detailed description of the supported features and the usage of the block please refer to the detailed documentation Microchip Motor Control ADC.

Parameters

System clock [Hz]
The system clock of the processor defined in Hz.
Internal RC clock [Hz]
PWM time base control register.
External Reference [Vref-, Vref+]
Specification of external reference voltage in mask.
Internal Reference [AVSS,AVDD]
Specification of internal reference voltage in mask.
ADCONx
ADC control register x.
ADCHS123
ADC input channel 1, 2, 3 select register.
ADCHS0
ADC input channel 0 select register.
ADCSSL
ADC input scan select register low.
Output Mode
Defines representation of conversion results.

Probe Signals

ADCONx
ADC control register x.
ADCHS123
ADC input channel 1, 2, 3 select register.
ADCHS0
ADC input channel 0 select register.
ADCSSL
ADC input scan select register low.